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2006 Microchip Technology Inc.
Preliminary
DS70178C-page 179
dsPIC30F1010/202X
REGISTER 16-7:
A/D CONVERT PAIR CONTROL REGISTER #2 (ADCPC2)
R/W-0
IRQEN5
PEND5
SWTRG5
TRGSRC5<4:0>
bit 15
bit 8
R/W-0
IRQEN4
PEND4
SWTRG4
TRGSRC4<4:0>
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
.
bit 15
IRQEN5: Interrupt Request Enable 5 bit
1
= Enable IRQ generation when requested conversion of channels AN11 and AN10 is completed
0
= IRQ is not generated
bit 14
PEND5: Pending Conversion Status 5 bit
1
= Conversion of channels AN11 and AN10 is pending. Set when selected trigger is asserted
0
= Conversion is complete
bit 13
SWTRG5: Software Trigger 5 bit
1
= Start conversion of AN11 and AN10 (if selected by TRGSRC bits). If other conversions are in
progress, then conversion will be performed when the conversion resources are available. This bit will
be reset when the PEND bit is set.
bit 12-8
TRGSRC5<4:0>: Trigger Source Selection 5 bits
Selects trigger source for conversion of analog channels A11 and A10.
00000
= No conversion enabled
00001
= Individual software trigger selected
00010
= Global software trigger selected
00011
= PWM Special Event Trigger selected
00100
= PWM generator #1 trigger selected
00101
= PWM generator #2 trigger selected
00110
= PWM generator #3 trigger selected
00111
= PWM generator #4 trigger selected
01100
= Timer #1 period match
01101
= Timer #2 period match
01110
= PWM GEN #1 current-limit ADC trigger
01111
= PWM GEN #2 current-limit ADC trigger
10000
= PWM GEN #3 current-limit ADC trigger
10001
= PWM GEN #4 current-limit ADC trigger
10110
= PWM GEN #1 fault ADC trigger
10111
= PWM GEN #2 fault ADC trigger
11000
= PWM GEN #3 fault ADC trigger
11001
= PWM GEN #4 fault ADC trigger
bit 7
IRQEN4: Interrupt Request Enable 4 bit
1
= Enable IRQ generation when requested conversion of channels AN9 and AN8 is completed
0
= IRQ is not generated
bit 6
PEND4: Pending Conversion Status 4 bit
1
= Conversion of channels AN9 and AN8 is pending. Set when selected trigger is asserted.
0
= Conversion is complete
bit 5
SWTRG4: Software Trigger 4 bit
1
= Start conversion of AN9 and AN8 (if selected by TRGSRC bits). If other conversions are in
progress, then conversion will be performed when the conversion resources are available. This bit will
be reset when the PEND bit is set.
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